74F112PC related parameters_74F112PC PDF documentation_National Semiconductor

Logic - Flip Flops

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Specifications

Description	Details
Series	74F
Package	Bulk
Function	Set(Preset) and Reset
Type	JK Type
Output Type	Complimentary
Number of Elements	2
Number of Bits per Element	1
Clock Frequency	105 MHz
Max Propagation Delay @ V, Max CL	6.5ns @ 5V, 50pF
Trigger Type	Negative Edge
Current - Output High, Low	1mA, 20mA
Voltage - Supply	4.5V ~ 5.5V
Current - Quiescent (Iq)	19 mA
Input Capacitance	-
Operating Temperature	0°C ~ 70°C (TA)
Mounting Type	Through Hole
Supplier Device Package	16-PDIP
Package / Case	16-DIP (0.300", 7.62mm)

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