SI5396D-A-GM related parameters_SI5396D-A-GM PDF documentation_Silicon Labs

requency Synthesizers

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Specifications

Description	Details
Series	DSPLL®
Package	Tray
Type	Clock Multiplier, Jitter Attenuator
PLL	Yes
Input	LVCMOS, Crystal
Output	CML, HCSL, LVCMOS, LVDS, LVPECL
Number of Circuits	1
Ratio - InputOutput	4:12
Differential - InputOutput	Yes/Yes
Frequency - Max	350MHz
Divider/Multiplier	Yes/No
Voltage - Supply	1.71V ~ 1.89V, 3.14V ~ 3.47V
Operating Temperature	-40°C ~ 85°C (TA)
Mounting Type	Surface Mount
Package / Case	64-VFQFN Exposed Pad
Supplier Device Package	64-QFN (9x9)

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